产品应用与封装尺寸
图纸取自原厂规格书，点击可放大查看原始尺寸标注。
引脚定义与内部结构
| 引脚 | 符号 | 名称 |
|---|---|---|
| 4 | GND | |
| 5 | VO | |
| 6 | VDD | |
| 7 | VO | |
| 8 | VDD |
数据来源：原厂规格书引脚图
关键参数速览
- 正向电压 VF
- mA (Figure 1 & 2)
- 电源电压 VCC
- ≤ V ≤ 5.5
- 工作温度 TA
- 105
产品特点 Features
- ACPL-M21L (single channel SO-5 package), ACPL-021L
- (single channel SO-8 package) and ACPL-024L (dual channel SO-8 package) are optically-coupled logic gates.
- The detector IC has CMOS output stage and optical receiver input stage with built-in Schmitt trigger to provide logic-compatible waveforms, eliminating the need for additional waveshaping.
- CMOS output
- Wide supply voltage: 2.7 V – 5.5 V
- Low power supply current I : 1.1 mA/channel max.
- Low forward current I : 1.6 mA min
- Speed: 5 MBd typ
- Pulse width distortion (PWD): 200 ns max
- Propagation delay skew (tpsk): 220 ns max
- Propagation delay (tp): 250 ns max
- Common mode rejection: 25 kV/μs min at V = 1000 V
- Hysteresis: 0.2 mA typ
- Temperature range: -40 °C to 105 °C
绝对最大额定值 Absolute Maximum Ratings（TA = 25°C）
超过下表数值可能造成器件永久损坏，设计时请留余量。
| 参数 | 符号 | 最小 | 最大 | 单位 | 条件 |
|---|---|---|---|---|---|
| Storage Temperature | T | -55 | 125 | °C | |
| Operating Temperature | T | -40 | 105 | °C | |
| Supply Voltage | V | 6.5 | V | ||
| Average Forward Input | Current I | 8 | mA | ||
| Peak Forward Input Current | I | 1 | A | ≤ 1 μs Pulse Width, | |
| < 300 pulses per second | |||||
| Output Current | I | 10 | mA | At max V | |
| Output Voltage | V | -0.5 | V +0.5 | V | |
| Lead Solder Temperature | T | 260 °C for | 10 sec., 1.6 mm | below seating plane |
数据来源：原厂规格书
安全与绝缘额定值（DIN EN/IEC 60747−5−5）
| 参数 | 符号 | ACPL-M21L | ACPL-021L | 单位 | 条件 |
|---|---|---|---|---|---|
| ACPL-024L | |||||
| Minimum External Air | Gap L(101) | 5 | 4.9 | mm | Measured from input terminals to output |
| (Clearance) | terminals, shortest distance through air. | ||||
| Minimum External | L(102) | 5 | 4.8 | mm | Measured from input terminals to output |
| Tracking (Creepage) | terminals, shortest distance path along body. | ||||
| Minimum Internal | Plastic Gap | 0.08 | 0.08 | mm | Through insulation distance conductor to |
| (Internal Clearance) | conductor, usually the straight line distance | ||||
| Tracking Resistance | CTI | 175 | 175 | Volts | DIN IEC 112/VDE 0303 Part 1 |
| Isolation Group | IIIa | IIIa | Material Group (DIN VDE 0110, 1/89, Table 1) ACPL-M21L/ | ||
| V x 1.875 = V , | 100% Production Test | V | 1063 V | ||
| IORM PR | PR | peak | |||
| V x 1.6 = V , Type | and Sample Test, | V | 896 V | ||
| IORM PR | PR V | peak 6000 V |
电气特性 Electrical Characteristics（TA = 25°C）
| 参数 | 符号 | Channel | 最小 | 典型 | 最大 | 单位 | 测试条件 |
|---|---|---|---|---|---|---|---|
| are at V = 2.7 V, T | = 25 °C, unless | otherwise | specified. | ||||
| Input Forward Voltage | V | 1.5 | 2.0 | V | I = 2.2 mA (Figure 1 & 2) | ||
| Logic High Output | Voltage V | V - 0.1 | V | I = 2.2 mA, I = -20 μA | |||
| OH | DD | F O | |||||
| V - 1.0 DD | V | I = 2.2 mA, I = -3.2 mA F O (Figure 3) | |||||
| Logic Low Output | Voltage V OL | 0.001 | 0.1 | V | I = 0 mA, I = 20 μA F O | ||
| 0.15 | 0.4 | V | I = 0 mA, I = 3.2 mA (Figure 4) | ||||
| Input Threshold Current | I | 0.5 | 1.4 | mA | Figure 5 | ||
| Logic Low Output | Supply I DDL | Single | 0.6 | 1.1 | mA | V = 0 V, V = 5.5 V, F DD | |
| Current | I = Open (Figure 6) | ||||||
| Dual | 1.2 | 2.2 | O | ||||
| Logic High Output | Supply I DDH | Single | 0.5 | 1.1 | mA | I = 2.2 mA, V = 5.5 V, F DD | |
| Current | I = Open (Figure 7) | ||||||
| Dual | 1.0 | 2.2 | O | ||||
| Input Capacitance | C | 77 | pF | f = 1 MHz, V = 0 V | |||
| Input Diode Temperature | ΔV /ΔT | -1.9 | mV/°C | I = 2.2 mA |