产品应用与封装尺寸
图纸取自原厂规格书，点击可放大查看原始尺寸标注。
引脚定义与内部结构
| 引脚 | 符号 | 名称 |
|---|---|---|
| 1 | RDAC | |
| 2 | RDAC | |
| 3 | RDAC | |
| 4 | V | |
| 5 | V |
数据来源：原厂规格书引脚图
关键参数速览
- 反向电压 VR
- V − 0.1
产品特点 Features
- 256-position, 4-channel A1 W1 B1 A2 W2 B2 A3 W3 B3 A4 W4 B4
- End-to-end resistance 20 kΩ, 50 kΩ, 200 kΩ VDD
- Pin-selectable SPI®- or I2C®-compatible interface VSS
- Power-on preset to midscale
- SHDN RDAC 1 RDAC 2 RDAC 3 RDAC 4
- Two package address decode pins AD0 and AD1 RES/AD1 REGISTER REGISTER REGISTER REGISTER
- Rheostat mode temperature coefficient 30 ppm/°C
- Voltage divider temperature coefficient 5 ppm/°C VL 8 AD5263
- Wide operating temperature range –40°C to +125°C CLK/SCL ADDRESS
- DECODER
- SDI/SDA SERIAL INPUT
- 10 V to 15 V single supply; ±5 V dual supply CS/AD0 SPI/I2C REGISTER
- SELECT
- GND LOGIC
- 1 The terms digital potentiometer, VR, and RDAC are used interchangeably.
- the ability to operate from +4.5 V to +15 V, or at ±5 V.
绝对最大额定值 Absolute Maximum Ratings（TA = 25°C）
超过下表数值可能造成器件永久损坏，设计时请留余量。
| 参数 | 值 |
|---|---|
| T = 25°C, unless otherwise Table 3. | noted. |
| V to GND | −0.3 V to +16.5 V |
| V to GND | −7.5 V to 0 V |
| V to V | +16.5 V |
| V to GND | −0.3 V to +6.5 V |
| V , V , V to GND | V to V |
| Terminal Current, Ax to Bx, Ax | to Wx, Bx to Wx |
| Data Sheet | AD5263 |
| AD5263 | Data Sheet |
数据来源：原厂规格书
电气特性 Electrical Characteristics（TA = 25°C）
| 参数 | 符号 | 条件 | 最小 | Typ1 | 最大 | 单位 |
|---|---|---|---|---|---|---|
| V = +5 V, V = –5 V, V | = +5 V, V = +V , V = 0 V, | –40°C < T < +125°C, | unless otherwise noted. | |||
| DC CHARACTERISTICS—RHEOSTAT | MODE | Specifications apply | to all VRs | |||
| Resistor Differential NL2 | R-DNL | R , V = NC | −1 | ±1/4 | +1 | LSB |
| Resistor Nonlinearity2 | R-INL | R , V = NC | −1 | ±1/2 | +1 | LSB |
| Nominal Resistor Tolerance3 | ∆R | T = 25°C | −30 | +30 | % | |
| Resistance Mode Temperature | ∆R /∆T | 30 | ppm/°C | |||
| ∆R /∆T | 30 | ppm/°C | ||||
| Wiper Resistance | R | I = 1 V/R | 60 | 150 | Ω | |
| DC CHARACTERISTICS—POTENTIOMETER | Specifications apply | to all VRs | ||||
| Resolution | N | 8 | Bits | |||
| Differential Nonlinearity4 | DNL | −1 | ±1/4 | +1 | LSB | |
| Integral Nonlinearity4 | INL | −1 | ±1/2 | +1 | LSB | |
| Voltage Divider Temperature | Coefficient ∆V /∆T | Code = 0x80 | 5 | ppm/°C | ||
| Full-Scale Error | V | Code = 0xFF | −2 | −1 | +0 | LSB |
| Zero-Scale Error | V | Code = 0x00 | 0 | +1 | +2 | LSB |
| Voltage Range5 | V | V | V | V | ||
| A,B,W | SS | DD | ||||
| Capacitance6 Ax, Bx | C | f = 1 MHz, measured | to GND, | 25 | pF | |
| Capacitance6 Wx | C | f = 1 MHz, measured | to GND, | 55 | pF | |
| Common-Mode Leakage | I | V = V = V /2 | 1 | nA | ||
| Shutdown Current7 | I | 0.02 | 5 | µA | ||
| Input Logic High | V | 2.4 | V | |||
| Input Logic Low | V | 0.8 | V | |||
| IH | SS | L | L | |||
| IL | SS | L | ||||
| Input Current | I | V = 0 V or +5 V | ±1 | µA | ||
| Input Capacitance6 | C | 5 | pF | |||
| SDA | V | I = 3 mA | 0.4 | V | ||
| V | I = 6 mA | 0.6 | V | |||
| O1, O2 | V | I = 40 µA | 4 | V | ||
| O1, O2 | V | I = 1.6 mA | 0.4 | V | ||
| SDO | V | R = 2.2 kΩ to V | V − 0.1 | V | ||
| OH | L DD | DD | ||||
| SDO | V | I = 3 mA | 0.4 | V | ||
| Three-State Leakage Current | I | V = 0 V or +5 V | ±1 | µA | ||
| Output Capacitance6 | C | 3 | 8 | pF | ||
| AD5263 | Data | Sheet | ||||
| Logic Supply8 | V | 2.7 | 5.5 | V | ||
| Power Single-Supply Range | V | V = 0 V | 4.5 | 16.5 | V | |
| Power Dual-Supply Range | V | ±4.5 | ±7.5 | V | ||
| Logic Supply Current9 | I | V = +5 V | 25 | 60 | µA | |
| Positive Supply Current | I | V = +5 V or V = 0 V | 1 | µA | ||
| Negative Supply Current | I | V = –5 V | 1 | µA | ||
| Power Dissipation10 | P | V = +5 V or V = 0 V, | V = | 0.6 | mW | |
| DISS | IH IL | DD | ||||
| Power Supply Sensitivity | PSS | ∆V = +5 V ± 10% | 0.002 | 0.01 | %/% | |
| Bandwidth (3 dB) | BW | R = 20 kΩ/50 kΩ/200 | kΩ | 300/150/35 | kHz | |
| Total Harmonic Distortion | THD | V = 1 V rms, V = 0 V, | f = 1 kHz, | 0.05 | % | |
| V Settling Time12 | t | V = 10 V, V = 0 V, ±1 | LSB error | 2 | µs | |
| Resistor Noise Voltage | e | R = 10 kΩ, f = 1 kHz, | RS = 0 | 9 | nV/√Hz | |
| Data Sheet | AD5263 | |||||
| TIMING | CHARACTERISTICS—20 kΩ, 50 | kΩ, 200 kΩ | VERSIONS | |||
| V = +5 V, V = –5 V, V = | +5 V, V = +V , V = 0 V, –40°C | < T < +125°C, unless | otherwise noted. | |||
| SPI INTERFACE TIMING | CHARACTERISTICS | Specifications apply to | all parts2, 3 | |||
| Clock Frequency | f | 25 | MHz | |||
| Input Clock Pulse Width | t , t | Clock level high or low | 20 | ns | ||
| Data Setup Time | t | 10 | ns | |||
| Data Hold Time | t | 10 | ns | |||
| CS Setup Time | t | 15 | ns | |||
| CS High Pulse Width | t | 20 | ns | |||
| CLK Fall to CS Fall Hold Time | t | 0 | ns | |||
| CLK Fall to CS Rise Hold Time | t | 0 | ns | |||
| CS Rise to Clock Rise Setup | t | 10 | ns | |||
| Reset Pulse Width | t | 5 | ns | |||
| I2C INTERFACE TIMING | CHARACTERISTICS | Specifications apply to | all parts2, 3 | |||
| SCL Clock Frequency | f | 400 | kHz | |||
| t Low Period of SCL Clock | t | 1.3 | µs | |||
| t High Period of SCL Clock | t | 0.6 | 50 | µs | ||
| t Setup Time for Start | Condition t | 0.6 | µs | |||
| t Data Hold Time | t | 0.9 | µs | |||
| t Data Setup Time | t | 100 | ns | |||
| t Setup Time for Stop | Condition t | 0.6 | µs |
特性曲线（Typical Performance Curves）
