Name: AVAGO HCPL-M601-500E
Brand: AVAGO
Availability: InStock

产品实拍图

本页为博科信现货实拍（器件丝印见规格书）。图片已加防盗水印，需要最新批次照片或未加水印原图请联系销售；点击图片可放大。

产品应用与封装尺寸

图纸取自原厂规格书，点击可放大查看原始尺寸标注。

引脚定义与内部结构

引脚	符号	名称
4	GND
5	VOUT
6	VCC
7	V
8	MINUTES

数据来源：原厂规格书引脚图

关键参数速览

电源电压 VCC: 7 V
工作温度 TA: to +85°C

产品特点 Features

These small outline high CMR, high speed, logic gate opto coup lers are single channel devices in a five lead
kΩ Surface Mountable
kΩ Very Small, Low Profile JEDEC Registered Package
Outline
Outline Drawing (JEDEC MO-155)
ANODE 1 6 VCC
4.4 ± 0.1 7.0 ± 0.2 5 VOUT
(0.173 ± 0.004) XXX (0.276 ± 0.008)
CATHODE 3 4 GND
0.4 ± 0.05
(0.016 ± 0.002)
3.6 ± 0.1*
(0.142 ± 0.004)
0.102 ± 0.102
2.5 ± 0.1 (0.004 ± 0.004) 0.216 ± 0.038
(0.098 ± 0.004) (0.0085 ± 0.0015)

绝对最大额定值 Absolute Maximum Ratings（TA = 25°C）

超过下表数值可能造成器件永久损坏，设计时请留余量。

参数	Abs.	最大
(No Derating Required up to 85°C)
Storage Temperature	-55°C	to +125°C
Operating Temperature	-40°C	to +85°C
Forward Input Current - I (see Note 2)	20	mA
Supply Voltage - V (1 Minute Maximum)	7 V
Output Collector Current - I	50	mA
Output Collector Power Dissipation	85	mW
Output Collector Voltage - V	7 V
(Selection for higher output voltages	up to 20 V is available)
PREHEATING	RATE 3°C + 1°C/–0.5°C/SEC.
REFLOW HEATING )C°( 200 160°C 150°C 140°C	RATE 2.5°C ± 0.5°C/SEC. 245°C	240°C 230°C 30 TIME SEC. 200°C
	3°C + 1°C/–0.5°C	SEC.
	150°C, 90 + 30 SEC.	50 SEC.
0 50	100 150	200 250
217 °C	TIME WITHIN 20-40 SEC. 260 +0/-5 °C	5 °C of ACTUAL
ERUTAREPMET 3 °C/SEC.	MAX. RAMP-DOWN
150 - 200 °C	6 °C/SEC.	MAX.
PREHEAT	60 to 150 SEC.
60 to 180	SEC.
t 25 °C to	PEAK
		TEMPERATURE = 8 MINUTES MAX.
	TIME	Tsmax = 200 °C, Tsmin = 150 °C

数据来源：原厂规格书

安全与绝缘额定值（DIN EN/IEC 60747−5−5）

参数	符号	值	单位	条件
Minimum External Air	Gap L(101)	5	mm	Measured from input terminals to output terminals,
(External Clearance)				shortest distance through air.
Minimum External	L(102)	5	mm	Measured from input terminals to output terminals,
Tracking (External	Creepage)			shortest distance path along body.
Minimum Internal Plastic	Gap	0.08	mm	Through insulation distance conductor to conductor,
(Internal Clearance)				usually the straight line distance thickness between
Tracking Resistance	CTI	175	V	DIN IEC 112/VDE 0303 Part 1
(Comparative Tracking	Index)
Isolation Group		IIIa		Material Group (DIN VDE 0110, 1/89, Table 1)
Input to Output Test	Voltage, Method b*		V	1050 Vpeak
V x 1.875=V , 100%	Production Test with	tm=1 sec,
Input to Output Test	Voltage, Method a*		V	840 Vpeak
V x 1.5=V , Type	and Sample Test, tm=60	sec,
Highest Allowable	Overvoltage		V	6000 Vpeak
(Transient Overvoltage	t =10 sec)
Min. External Air Gap	L(IO1)	≥5	mm	Measured from input terminals
(Clearance)				to output terminals
Min. External Tracking Path	L(IO2)	≥5	mm	Measured from input terminals
(Creepage)				to output terminals
(Clearance)				conductor to conductor
Tracking Resistance	CTI	175	V	DIN IEC 112/VDE 0303 Part 1
Isolation Group (per DIN VDE	0109)	IIIa		Material Group DIN VDE 0109
Resistance	R 1012	Ω	V =	500 V 3
Capacitance	C 0.6	pF	f = 1	MHz 3

电气特性 Electrical Characteristics（TA = 25°C）

参数	符号	最小	Typ.*	最大	单位	测试条件	图号	备注
Input Threshold	I TH		2	5	mA	V = 5.5 V, I ≥13 mA, CC O	13
Current						V = 0.6 V
High Level Output	I OH		5.5	100	μA	V = 5.5 V, V = 5.5 V CC O	1
Current						I = 250 μA
Low Level Output	V OL		0.4	0.6	V	V = 5.5 V, I = 5 mA, CC F	2, 4,
Voltage						I (Sinking) = 13 mA	5, 13
High Level Supply	I CCH		4	7.5	mA	V = 5.5 V, I = 0 mA, CC F
Low Level Supply	I CCL		6	10.5	mA	V = 5.5 V, I = 10 mA, CC F
Input Forward	V F	1.4		1.75	V	T = 25°C, I =10 mA A F	3
		1.3		1.85		I = 10 mA
Input Capacitance	C		60		pF	V = 0V, f = 1 MHz
Input Diode	∆V /∆T		-1.6		mV/°C	I = 10 mA	12
Input-Output	V	3750			V	RH ≤ 50%, t = 1 min.		3, 4

订货信息与供货形式

To	order,	choose	a	型号	型号2	from	型号3	型号4
Part			RoHS		Non	RoHS		Surface
tion	column	to	form	an	order	entry.	Combination	of
The	notation	‘#XXX’	is	used for	existing	products,	while (new)	products

应用领域 Applications

kΩ Isolated Line ReceiverkΩ Simplex/Multiplex Data TransmissionkΩ Computer-Peripheral InterfacekΩ Microprocessor System InterfacekΩ Switching Power SupplykΩ Instrument Input/Output IsolationkΩ Ground Loop EliminationkΩ Pulse Transformer ReplacementOutline Drawing (JEDEC MO-155)ANODE 1 6 VCC4.4 ± 0.1 7.0 ± 0.2 5 VOUT(0.173 ± 0.004) XXX (0.276 ± 0.008)

资料下载

📄 HCPL-M601-500E 规格书 PDF

规格书为原厂公开资料，点击在新窗口打开下载。

获取报价 / 申请样品

常备现货、免费送样、支持小批量试产。报出用量与封装要求，当天给报价与交期。

💬 咨询 / 询价查看完整产品目录

HCPL-M601-500E 高速数字光耦