产品应用与封装尺寸
图纸取自原厂规格书，点击可放大查看原始尺寸标注。
引脚定义与内部结构
| 引脚 | 符号 | 名称 |
|---|---|---|
| 5 | V | |
| 6 | V | |
| 7 | V | |
| 8 | CASE |
数据来源：原厂规格书引脚图
关键参数速览
- 正向电压 VF
- 1.70
- 电源电压 VCC
- −0.5 to 7.0
- 工作温度 TA
- −40 to +100
产品特点 Features
- PDIP8 9.655x6.6, 2.54P outputs. The switching parameters are guaranteed over the
- CASE 646CQ temperature range of −40 ° C to +85 ° C. A maximum input signal of 8
- 5 mA will provide a minimum output sink current of 13 mA (fan out of 8).
- An internal noise shield provides superior common mode rejection
- kΩ of typically 10 kV/ s. The HCPL2601M and HCPL2631M has a PDIP8 GW minimum CMR of 5 kV/ kΩ s. The HCPL2611M has a minimum CMR 8 CASE 709AC
- kΩ of 10 kV/ s.
- Very High Speed – 10 MBit/s PDIP8 GW
- kΩ 8 CASE 709AD
- Superior CMR – 10 kV/ s
- Fan−out of 8 Over −40 ° C to +85 ° C 1
- Logic Gate Output
- Strobable Output MARKING DIAGRAM
- Wired OR−open Collector
- Single−Channel: 6N137M, HCPL2601M, HCPL2611M Dual−Channel: HCPL2630M,
- HCPL2631M
- SCHEMATICS
绝对最大额定值 Absolute Maximum Ratings（TA = 25°C）
超过下表数值可能造成器件永久损坏，设计时请留余量。
| 符号 | 参数 | 器件 | 值 | 单位 |
|---|---|---|---|---|
| T Storage | Temperature | −40 to +125 | °C | |
| T Operating | Temperature | −40 to +100 | °C | |
| T Junction | Temperature | −40 to +125 | °C | |
| T Lead Solder | Temperature | 260 for 10 s | °C | |
| I (avg) DC/Average | Forward Input Current Per Channel | Single Channel | 50 | mA |
| Dual Channel | 30 | |||
| V Enable Input | Voltage Not to Exceed V by More than 500 | mV Single Channel | 5.5 | V |
| P Input Power | Dissipation Per Channel | Single Channel | 100 | mW |
| Dual Channel | 45 | |||
| V Supply Voltage | All | −0.5 to 7.0 | V | |
| I (avg) Average Output | Current Per Channel | All | 25 | mA |
| I (pk) Peak Output | Current Per Channel | All | 50 | mA |
| V Output Voltage | Per Channel | All | −0.5 to 7.0 | V |
| P Output Power | Dissipation Per Channel | Single Channel | 85 | mW |
| Dual Channel | 60 |
数据来源：原厂规格书
安全与绝缘额定值（DIN EN/IEC 60747−5−5）
| 参数 | 特性 |
|---|---|
| V Highest Allowable Over−Voltage | 6,000 V |
| External Creepage | ≥8.0 mm |
| External Clearance | ≥7.4 mm |
| External Clearance (for Option TV, 0.4” Lead Spacing) | ≥10.16 mm |
| T Case Temperature (Note 2) | 150 °C |
| I Input Current (Note 2) | 200 mA |
| P Output Power (Duty Factor ≤ 2.7%) (Note 2) | 300 mW |
| R Insulation Resistance at T , V = 500 V (Note 2) | >109 µ |
电气特性 Electrical Characteristics（TA = 25°C）
| 符号 | 参数 | 测试条件 | 器件 | 最小 | 典型 | 最大 | 单位 |
|---|---|---|---|---|---|---|---|
| V Input | Forward Voltage | I = 10 mA, T = 25°C | All | − | 1.45 | 1.70 | V |
| I = 10 mA | − | − | 1.80 | ||||
| C Input | Capacitance | V = 0, f = 1 MHz | All | − | 60 | − | pF |
| V / T | Temperature Coefficient of | I = 10 mA | All | − | −1.4 | − | mV/°C |
| I Logic | Low Supply Current | I = 10 mA, V = Open, V = 0.5 | V Single Channel | − | 8 | 13 | mA |
| I = I = 10 mA, V = Open | Dual Channel | − | 14 | 21 | |||
| I Logic | High Supply Current | I = 0 mA, V = Open, V = 0.5 V | Single Channel | − | 6 | 10 | mA |
| I = 0 mA, V = Open | Dual Channel | − | 10 | 15 | |||
| I Low | Level Enable Current | V = 0.5 V | Single Channel | − | −0.7 | −1.6 | mA |
| I High | Level Enable Current | V = 2.0 V | Single Channel | − | −0.5 | −1.6 | mA |
| V Low | Level Enable Voltage | I = 10 mA (Note 4) | Single Channel | − | − | 0.8 | V |
| V High | Level Enable Voltage | I = 10 mA | Single Channel | 2.0 | − | − | V |
| TRANSFER | CHARACTERISTICS (V | = 5.5 V, T = −40°C to +85°C unless | otherwise specified) | ||||
| I Input | Threshold Current | V = 0.6 V, V = 2.0 V, I = 13 | mA All | − | 3 | 5 | mA |
| I HIGH | Level Output Current | V = 5.5 V, I = 250 kΩA, V = 2.0 | V All | − | − | 100 | kΩA |
| V LOW | Level Output Voltage | I = 5 mA, V = 2.0 V, I = 13 mA | All | − | 0.4 | 0.6 | V |
| t | Propagation Delay Time to | R = 350 µ, C = 15 pF, T = 25°C | All | 25 | 40 | 75 | ns |
| Logic | LOW | (Note 5) (Figure 23) | |||||
| R = 350 µ, C = 15 pF (Note 5) | − | − | 100 | ||||
| t | Propagation Delay Time to | R = 350 µ, C = 15 pF, T = 25°C | All | 20 | 40 | 75 | ns |
| Logic | HIGH | (Note 6) (Figure 23) | |||||
| R = 350 µ, C = 15 pF (Note 6) | − | − | 100 | ||||
| |t –t | Pulse | Width Distortion | R = 350 µ, C = 15 pF (Figure 23) | All | − | 1 | 35 | ns |
| t | Output Rise Time | R = 350 µ, C = 15 pF (Note 7) | All | − | 30 | − | ns |
| t | Output Fall Time | R = 350 µ, C = 15 pF(Note 8) | All | − | 10 | − | ns |
| t | Enable Propagation Delay | V = 3.5 V, R = 350 µ, C = 15 | pF Single Channel | − | 15 | − | ns |
| Time | to Output LOW Level | (Note 9) (Figure 24) | |||||
| t | Enable Propagation Delay | V = 3.5 V, R = 350 µ, C = 15 | pF Single Channel | − | 15 | − | ns |
| Time | to Output HIGH Level | (Note 10) (Figure 24) | |||||
| |CM | | Common Mode Transient | I = 0 mA, V = 50 V , | 6N137M, | − | 10,000 | − | V/kΩs |
| Immunity at Logic High | R = 350 µ, T = 25°C (Note 11) | HCPL2630M | |||||
| HCPL2601M, | 5000 | 10,000 | − | ||||
| I = 0 mA, V = 400 V , | 10,000 | 15,000 | − | ||||
| Single−Channel: 6N137M, | HCPL2601M, | HCPL2611M | Dual−Channel: | HCPL2630M, | |||
| |CM | | Common Mode Transient | V = 50 V , R = 350 µ, | 6N137M, | − | 10,000 | − | V/kΩs |
| Immunity at Logic Low | T = 25°C (Note 11) (Figure 25) | HCPL2630M | |||||
| HCPL2601M, | 5000 | 10,000 | − | ||||
| V = 400 V , R = 350 µ, | HCPL2611M | 10,000 | 15,000 | − |