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引脚定义与内部结构
| 引脚 | 符号 | 名称 |
| 1 | Anode | |
| 3 | Cathode | |
| 4 | GND | |
| 5 | V (Output) | |
| 6 | Principle of Operation | |
数据来源:原厂规格书引脚图
关键参数速览
- 正向电压 VF
- 1.80
- 正向电流 IF
- 20
- 电源电压 VCC
- 30
- 工作温度 TA
- -40 to 100
产品特点 Features
- (1) Buffer logic type (Totem pole output)
- (2) Output peak current: ±2.5 A (max)
- (3) Operating temperature: -40 to 100
- (4) Supply current: 3 mA (max)
- (5) Supply voltage: 10 to 30 V
- (6) Threshold input current: 7.5 mA(max)
- (7) Propagation delay time: t = 190 ns (max), t = 170 ns (max) pHL pLH
- (8) Common-mode transient immunity: ±20 kV/µs (min)
- TLP152
- 5. Internal Circuit (Note)
- Fig. 5.1 Internal Circuit
- Note: A 0.1-µF bypass capacitor must be connected between pin 6 and pin 4.
- 6. Principle of Operation
绝对最大额定值 Absolute Maximum Ratings(TA = 25°C)
超过下表数值可能造成器件永久损坏,设计时请留余量。
| 特性 | 符号 | 备注 | 额定值 | 单位 |
| LED Input forward current | I | | 20 | mA |
| Peak transient input forward | I | (Note 1) | 1 | A |
| Input power dissipation | P | | 40 | mW |
| Detector Peak high-level output current (T = -40 | to 100) I | (Note 2) | -2.5 | A |
| Peak low-level output current (T = -40 | to 100) I | (Note 2) | +2.5 | |
| Output voltage | V | | 35 | V |
| Supply voltage | V | | 35 | |
| Output power dissipation | P | | 260 | mW |
| Common Operating temperature | T | | -40 to 100 | |
| Storage temperature | T | | -55 to 125 | |
| Lead soldering temperature (10 | s) T | (Note 3) | 260 | |
数据来源:原厂规格书
安全与绝缘额定值(DIN EN/IEC 60747−5−5)
| 特性 | 最小 | 单位 |
| | TLP152 |
| FFFFiiiigggg.... 5555....1111 | IIIInnnntttteeeerrrrnnnnaaaallll CCCCiiiirrrrccccuuuuiiiitttt |
电气特性 Electrical Characteristics(TA = 25°C)
| 特性 | 符号 | 备注 | 测试条件 | 最小 | 典型 | 最大 | 单位 |
| Input forward voltage | V | | I = 10 mA, T = 25 | 1.40 | 1.57 | 1.80 | V |
| Input forward voltage | ∆V /∆T | | I = 10 mA | | -1.8 | | mV/ |
| Input capacitance | C | | V = 0 V, f = 1 MHz, T = | 25 | 45 | | pF |
| Peak high-level output | current I | (Note 1) Fig. | I = 10 mA, V = 15 V, | | -2.2 | -1.0 | A |
| | | I = 10 mA, V = 15 V, | | -3.4 | -2.0 | |
| Peak low-level output | current I | (Note 1) Fig. | I = 0 mA, V = 15 V, | 1.0 | 2.4 | | |
| | | I = 0 mA, V = 15 V, | 2.0 | 3.5 | | |
| High-level output voltage | V | Fig. | I = 10 mA, V = 10 V, | 6.0 | 8.5 | | V |
| Low-level output voltage | V | Fig. | V = 0.8 V, V = 10 V, | | 0.1 | 1.0 | |
| High-level supply current | I | Fig. | I = 10 mA, V = 10 to 30 | V, | 1.9 | 3.0 | mA |
| Low-level supply current | I | Fig. | I = 0 mA, V = 10 to 30 | V, | 1.8 | 3.0 | |
| Threshold input current | (L/H) I | | V = 15 V, V > 1 V | | 1.5 | 7.5 | |
| Threshold input voltage | (H/L) V | | V = 15 V, V < 1 V | 0.8 | 1.47 | | V |
| Supply voltage | V | | | 10 | | 30 | |
| UVLO threshold voltage | V + | | I = 5 mA , V > 2.5 V | 7.5 | 8.7 | 9.5 | |
| V - | | I = 5 mA, V < 2.5 V | 7.5 | 8.4 | 9.5 | |
| UVLO hysteresis | UVLO | | I = 5 mA , V > 2.5 V | | 0.3 | | TLP152 |
应用领域 Applications
Plasma Display Panels (PDPs)Transistor InvertersMOSFET Gate DriversIGBT Gate Drivers2. GeneralTLP1525. Internal Circuit (Note)Fig. 5.1 Internal Circuit6. Principle of Operation
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